Advanced Packaging & HBM Stocks

Packaging became the bottleneck when shrinking stopped being enough

For fifty years the semiconductor industry improved by making transistors smaller. That still happens, but it no longer delivers the gains it once did and it has become extraordinarily expensive. The response was to change what happens after the wafer is finished: instead of building one larger chip, build several and connect them so tightly that they behave as one. Packaging moved from an afterthought at the end of the line to one of the constraints deciding how many AI processors the world can build.

Two and a half dimensional integration places multiple dies side by side on a silicon interposer, a layer carrying thousands of connections between them at a density no circuit board approaches. This is how a processor and its memory stacks are joined, and it is the specific capacity that has repeatedly been sold out. Three dimensional stacking places dies directly on top of one another, connected vertically through the silicon itself. Chiplet architectures take the logical conclusion: build a processor from several smaller dies made on different process nodes, each optimised for its function, joined in the package.

High bandwidth memory is the application that made this urgent. Memory dies are stacked and placed immediately beside the processor, because feeding an AI accelerator from conventional memory is impossible at the required rate. Assembling those stacks with acceptable yield is difficult and the capacity to do it is concentrated.

The listed exposure sits in three layers. Assembly and test providers perform packaging as a service for chipmakers who do not do it themselves. Equipment makers supply the bonders, deposition and cleaning tools. Inspection and metrology companies matter more here than almost anywhere, because a defect found after several expensive dies have been bonded destroys all of them at once.

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